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C8051F380/1/2/3/4/5/6/7/C
19.3. Programmable Internal High-Frequency (H-F) Oscillator
All C8051F380/1/2/3/4/5/6/7/C devices include a programmable internal high-frequency oscillator that
defaults as the system clock after a system reset. The internal oscillator period can be adjusted via the
On C8051F380/1/2/3/4/5/6/7/C devices, OSCICL is factory calibrated to obtain a 48 MHz base frequency.
Note that the system clock may be derived from the programmed internal oscillator divided by 1, 2, 4, or 8
after a divide by 4 stage, as defined by the IFCN bits in register OSCICN. The divide value defaults to 8 fol-
lowing a reset, which results in a 1.5 MHz system clock.
19.3.1. Internal Oscillator Suspend Mode
When software writes a logic 1 to SUSPEND (OSCICN.5), the internal oscillator is suspended. If the sys-
tem clock is derived from the internal oscillator, the input clock to the peripheral or CIP-51 will be stopped
until a non-idle USB event is detected or a rising or falling edge occurs on the VBUS signal. Note that the
USB transceiver can still detect USB events when it is disabled.
When one of the oscillator awakening events occur, the internal oscillator, CIP-51, and affected peripherals
resume normal operation. The CPU resumes execution at the instruction following the write to the SUS-
PEND bit.
Note: The prefetch engine can be turned off in suspend mode to save power. Additionally, both Voltage
Regulators (REG0 and REG1) have low-power modes for additional power savings in suspend mode.
SFR Definition 19.2. OSCICL: Internal H-F Oscillator Calibration
Bit
7
6
5
4
3
2
1
0
Name
OSCICL[6:0]
Type
R
R/W
Reset
0
Varies
Varies
Varies
Varies
Varies
Varies
Varies
SFR Address = 0xB3; SFR Page = All Pages
Bit Name
Function
7
Unused
Read = 0; Write = don’t care
6:0
OSCICL[6:0] Internal Oscillator Calibration Bits.
These bits determine the internal oscillator period. When set to 0000000b, the H-F
oscillator operates at its fastest setting. When set to 1111111b, the H-F oscillator
operates at its slowest setting. The reset value is factory calibrated to generate an
internal oscillator frequency of 48 MHz. OSCICL should only be changed by firm-
ware when the H-F oscillator is disabled (IOSCEN = 0).
Rev. 1.4
145
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